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- Author: Vaibbhav Taraate
- Language: English
- Year: 2022
![book Digital Design from the VLSI Perspective: Concepts for VLSI Beginners](/covers/files_170/3415000/9a817bf16bd7bf1e408843c260033375-d.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2022
![book Digital Design Techniques and Exercises: A Practice Book for Digital Logic Design](/covers/files_170/3173000/1440bca483ca7df3e8a4092218183ce4-g.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2021
![book Digital logic design using Verilog : coding and RTL synthesis](/covers/files_170/3129000/c665de8aa042abceb1176c398da0c29b-g.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2022
![book Digital Logic Design Using Verilog: Coding and RTL Synthesis](/covers/files_170/3128000/d5a538f8665e4622c4d01bebf12bbc9b-g.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2021
![book ASIC Design and Synthesis. RTL Design Using Verilog](/covers/files_170/2895000/9b8bba4e5121cd9e02c7dbb20875d49d-g.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2021
![book SystemVerilog for Hardware Description : RTL Design and Verification](/covers/files_170/2884000/a339e5ede9109896ee8f31b0047f2bf2-d.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2020
![book Advanced HDL Synthesis and SOC Prototyping: RTL Design Using Verilog](/covers/files_170/2313000/029d42646fd8d1a8c36c35313c288d36-d.jpg)
- Author: Vaibbhav Taraate
- Language: English
- Year: 2019
![book PLD Based Design with VHDL: RTL Design, Synthesis and Implementation](/covers/files_170/1628000/0a87932f695ac088c990b48c5b30094c-d.jpg)
- Author: Vaibbhav Taraate (auth.)
- Language: English
- Year: 2017
![book PLD based Design with VHDL](/covers/files_170/1618000/d0405444818a3bc790cff1e3f8087210-g.jpg)
- Author: Vaibbhav Taraate
- Language: english
- Year: 2017