Ebook: Pyramidal Systems for Computer Vision

This book contains the proceedings of the NATO Advanced Research Workshop held in Maratea (Italy), May 5-9, 1986 on Pyramidal Systems for Image Processing and Computer Vision. We had 40 participants from 11 countries playing an active part in the workshop and all the leaders of groups that have produced a prototype pyramid machine or a design for such a machine were present. Within the wide field of parallel architectures for image processing a new area was recently born and is growing healthily: the area of pyramidally structured multiprocessing systems. Essentially, the processors are arranged in planes (from a base to an apex) each one of which is generally a reduced (usually by a power of two) version of the plane underneath: these processors are horizontally interconnected (within a plane) and vertically connected with "fathers" (on top planes) and "children" on the plane below. This arrangement has a number of interesting features, all of which were amply discussed in our Workshop including the cellular array and hypercube versions of pyramids. A number of projects (in different parts of the world) are reported as well as some interesting applications in computer vision, tactile systems and numerical calculations.

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Content:
Front Matter....Pages I-VIII
Parallel, Hierarchical Software/Hardware Pyramid Architectures....Pages 1-20
I.P. Hierarchical Systems: Architectural Features....Pages 21-39
General Purpose Pyramidal Architectures....Pages 41-58
Pyramids — Expected Performance....Pages 59-73
Hypercubes and Pyramids....Pages 75-89
Architectural Comparisons....Pages 91-108
A Pyramidal System for Image Processing....Pages 109-124
Counting on the Gam Pyramid....Pages 125-131
A Pipelined Pyramid Machine....Pages 133-152
The Papia Controller: Hardware Implementation....Pages 153-163
Custom Made Pyramids....Pages 165-171
Paradigms for Pyramid Machine Algorithms....Pages 173-194
Pyramid Algorithms on Processor Arrays....Pages 195-213
Pyramidal Transforms in Image Processing and Computer Vision....Pages 215-246
Overlapping in Compact Pyramids....Pages 247-260
Some Pyramid Techniques for Image Segmentation....Pages 261-271
Segmentation of Textured Images by Pyramid Linking....Pages 273-288
Local motion estimation with the Dynamic Pyramid....Pages 289-297
Vectorial Features in Pyramidal Image Processing....Pages 299-310
Programming Image Processing Machines....Pages 311-327
A High Level Language for Pyramidal Architectures....Pages 329-339
Tactile Information Processing....Pages 341-356
Silicon Implementation of Multiprocessor Pyramid Architecture....Pages 357-372
Fault-Tolerance Techniques in Arrays for Image Processing....Pages 373-392
Back Matter....Pages 393-394

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Content:
Front Matter....Pages I-VIII
Parallel, Hierarchical Software/Hardware Pyramid Architectures....Pages 1-20
I.P. Hierarchical Systems: Architectural Features....Pages 21-39
General Purpose Pyramidal Architectures....Pages 41-58
Pyramids — Expected Performance....Pages 59-73
Hypercubes and Pyramids....Pages 75-89
Architectural Comparisons....Pages 91-108
A Pyramidal System for Image Processing....Pages 109-124
Counting on the Gam Pyramid....Pages 125-131
A Pipelined Pyramid Machine....Pages 133-152
The Papia Controller: Hardware Implementation....Pages 153-163
Custom Made Pyramids....Pages 165-171
Paradigms for Pyramid Machine Algorithms....Pages 173-194
Pyramid Algorithms on Processor Arrays....Pages 195-213
Pyramidal Transforms in Image Processing and Computer Vision....Pages 215-246
Overlapping in Compact Pyramids....Pages 247-260
Some Pyramid Techniques for Image Segmentation....Pages 261-271
Segmentation of Textured Images by Pyramid Linking....Pages 273-288
Local motion estimation with the Dynamic Pyramid....Pages 289-297
Vectorial Features in Pyramidal Image Processing....Pages 299-310
Programming Image Processing Machines....Pages 311-327
A High Level Language for Pyramidal Architectures....Pages 329-339
Tactile Information Processing....Pages 341-356
Silicon Implementation of Multiprocessor Pyramid Architecture....Pages 357-372
Fault-Tolerance Techniques in Arrays for Image Processing....Pages 373-392
Back Matter....Pages 393-394
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