Ebook: System-Level Validation: High-Level Modeling and Directed Test Generation Techniques

This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions. The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.

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This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions. The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.

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This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions. The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.
Content:
Front Matter....Pages i-xxi
Introduction....Pages 1-17
Modeling and Specification of SoC Designs....Pages 19-42
Automated Generation of Directed Tests....Pages 43-59
Functional Test Compaction....Pages 61-78
Property Clustering and Learning Techniques....Pages 79-106
Decision Ordering Based Learning Techniques....Pages 107-127
Synchronized Generation of Directed Tests....Pages 129-143
Test Generation Using Design and Property Decompositions....Pages 145-168
Learning-Oriented Property Decomposition Approaches....Pages 169-184
Directed Test Generation for Multicore Architectures....Pages 185-200
Test Generation for Cache Coherence Validation....Pages 201-214
Reuse of System-Level Validation Efforts....Pages 215-234
Conclusions....Pages 235-238
Back Matter....Pages 239-247

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This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions. The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.
Content:
Front Matter....Pages i-xxi
Introduction....Pages 1-17
Modeling and Specification of SoC Designs....Pages 19-42
Automated Generation of Directed Tests....Pages 43-59
Functional Test Compaction....Pages 61-78
Property Clustering and Learning Techniques....Pages 79-106
Decision Ordering Based Learning Techniques....Pages 107-127
Synchronized Generation of Directed Tests....Pages 129-143
Test Generation Using Design and Property Decompositions....Pages 145-168
Learning-Oriented Property Decomposition Approaches....Pages 169-184
Directed Test Generation for Multicore Architectures....Pages 185-200
Test Generation for Cache Coherence Validation....Pages 201-214
Reuse of System-Level Validation Efforts....Pages 215-234
Conclusions....Pages 235-238
Back Matter....Pages 239-247
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