Ebook: Design of Interconnection Networks for Programmable Logic

Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field­ programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit­ erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec­ tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi­ tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach.

---

This book presents the latest research results on the design of interconnect for programmable logic. The emphasis is on building the knowledge and tools for the automatic generation of interconnect structures. In this regard, the book presents design methodologies and applications for sparsely populated crossbars, clusters of lookup tables, switch blocks, and transistor-level routing switch design. It provides valuable information for both designers and architects about the area and delay implications of programmable interconnect. FPGA architects and System-on-Chip designers interested in exploring the integration of custom logic and programmable logic will find this work particularly useful.

---

This book presents the latest research results on the design of interconnect for programmable logic. The emphasis is on building the knowledge and tools for the automatic generation of interconnect structures. In this regard, the book presents design methodologies and applications for sparsely populated crossbars, clusters of lookup tables, switch blocks, and transistor-level routing switch design. It provides valuable information for both designers and architects about the area and delay implications of programmable interconnect. FPGA architects and System-on-Chip designers interested in exploring the integration of custom logic and programmable logic will find this work particularly useful.
Content:
Front Matter....Pages i-xx
Introduction....Pages 1-8
Interconnection Networks....Pages 9-24
Models, Methodology and CAD Tools....Pages 25-38
Sparse Crossbar Design....Pages 39-80
Sparse Cluster Design....Pages 81-100
Routing Switch Circuit Design....Pages 101-139
Switch Block Design....Pages 141-166
Conclusions....Pages 167-169
Back Matter....Pages 171-206

---

This book presents the latest research results on the design of interconnect for programmable logic. The emphasis is on building the knowledge and tools for the automatic generation of interconnect structures. In this regard, the book presents design methodologies and applications for sparsely populated crossbars, clusters of lookup tables, switch blocks, and transistor-level routing switch design. It provides valuable information for both designers and architects about the area and delay implications of programmable interconnect. FPGA architects and System-on-Chip designers interested in exploring the integration of custom logic and programmable logic will find this work particularly useful.
Content:
Front Matter....Pages i-xx
Introduction....Pages 1-8
Interconnection Networks....Pages 9-24
Models, Methodology and CAD Tools....Pages 25-38
Sparse Crossbar Design....Pages 39-80
Sparse Cluster Design....Pages 81-100
Routing Switch Circuit Design....Pages 101-139
Switch Block Design....Pages 141-166
Conclusions....Pages 167-169
Back Matter....Pages 171-206
....