Ebook: Logic Synthesis and Optimization

Logic Synthesis and Optimization presents up-to-date research information in a pedagogical form. The authors are recognized as the leading experts on the subject. The focus of the book is on logic minimization and includes such topics as two-level minimization, multi-level minimization, application of binary decision diagrams, delay optimization, asynchronous circuits, spectral method for logic design, field programmable gate array (FPGA) design, EXOR logic synthesis and technology mapping. Examples and illustrations are included so that each contribution can be read independently. Logic Synthesis and Optimization is an indispensable reference for academic researchers as well as professional CAD engineers.

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Logic Synthesis and Optimization presents up-to-date research information in a pedagogical form. The authors are recognized as the leading experts on the subject. The focus of the book is on logic minimization and includes such topics as two-level minimization, multi-level minimization, application of binary decision diagrams, delay optimization, asynchronous circuits, spectral method for logic design, field programmable gate array (FPGA) design, EXOR logic synthesis and technology mapping. Examples and illustrations are included so that each contribution can be read independently. Logic Synthesis and Optimization is an indispensable reference for academic researchers as well as professional CAD engineers.

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Logic Synthesis and Optimization presents up-to-date research information in a pedagogical form. The authors are recognized as the leading experts on the subject. The focus of the book is on logic minimization and includes such topics as two-level minimization, multi-level minimization, application of binary decision diagrams, delay optimization, asynchronous circuits, spectral method for logic design, field programmable gate array (FPGA) design, EXOR logic synthesis and technology mapping. Examples and illustrations are included so that each contribution can be read independently. Logic Synthesis and Optimization is an indispensable reference for academic researchers as well as professional CAD engineers.
Content:
Front Matter....Pages i-xv
A New Exact Minimizer for Two-Level Logic Synthesis....Pages 1-31
A New Graph Based Prime Computation Technique....Pages 33-57
Logic Synthesizers, The Transduction Method and Its Extension, Sylon....Pages 59-86
Network Optimization Using Don’t-Cares and Boolean Relations....Pages 87-108
Multi-Level Logic Minimization of Large Combinational Circuits by Partitioning....Pages 109-126
A Partitioning Method for Area Optimization by Tree Analysis....Pages 127-143
A New Algorithm for 0-1 Programming Based on Binary Decision Diagrams....Pages 145-165
Delay Models and Exact Timing Analysis....Pages 167-189
Challenges to Dependable Asynchronous Processor Design....Pages 191-213
Efficient Spectral Techniques for Logic Synthesis....Pages 215-232
FPGA Design by Generalized Functional Decomposition....Pages 233-258
Logic Synthesis with Exor Gates....Pages 259-285
And-Exor Expressions and their Optimization....Pages 287-312
A Generation Method For Exor-Sum-of-Products Expressions Using Shared Binary Decision Diagrams....Pages 313-322
A New Technology Mapping Method Based on Concurrent Factorization and Mapping....Pages 323-340
Gate Sizing for Cell-Based Designs....Pages 341-359
Back Matter....Pages 361-375

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Logic Synthesis and Optimization presents up-to-date research information in a pedagogical form. The authors are recognized as the leading experts on the subject. The focus of the book is on logic minimization and includes such topics as two-level minimization, multi-level minimization, application of binary decision diagrams, delay optimization, asynchronous circuits, spectral method for logic design, field programmable gate array (FPGA) design, EXOR logic synthesis and technology mapping. Examples and illustrations are included so that each contribution can be read independently. Logic Synthesis and Optimization is an indispensable reference for academic researchers as well as professional CAD engineers.
Content:
Front Matter....Pages i-xv
A New Exact Minimizer for Two-Level Logic Synthesis....Pages 1-31
A New Graph Based Prime Computation Technique....Pages 33-57
Logic Synthesizers, The Transduction Method and Its Extension, Sylon....Pages 59-86
Network Optimization Using Don’t-Cares and Boolean Relations....Pages 87-108
Multi-Level Logic Minimization of Large Combinational Circuits by Partitioning....Pages 109-126
A Partitioning Method for Area Optimization by Tree Analysis....Pages 127-143
A New Algorithm for 0-1 Programming Based on Binary Decision Diagrams....Pages 145-165
Delay Models and Exact Timing Analysis....Pages 167-189
Challenges to Dependable Asynchronous Processor Design....Pages 191-213
Efficient Spectral Techniques for Logic Synthesis....Pages 215-232
FPGA Design by Generalized Functional Decomposition....Pages 233-258
Logic Synthesis with Exor Gates....Pages 259-285
And-Exor Expressions and their Optimization....Pages 287-312
A Generation Method For Exor-Sum-of-Products Expressions Using Shared Binary Decision Diagrams....Pages 313-322
A New Technology Mapping Method Based on Concurrent Factorization and Mapping....Pages 323-340
Gate Sizing for Cell-Based Designs....Pages 341-359
Back Matter....Pages 361-375
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