Ebook: VLSI for Artificial Intelligence

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Content:
Front Matter....Pages i-xiii
Front Matter....Pages 1-1
From Low Level Semantic Description of Prolog to Instruction Set and VLSI Design....Pages 3-12
A 32 Bit Processor for Compiled Prolog....Pages 13-26
Carmel-1: A VLSI Architecture for Flat Concurrent Prolog....Pages 27-37
VLSI for Parallel Execution of Prolog....Pages 38-46
Front Matter....Pages 47-48
Supporting Functional and Logic Programming Languages through a Data Parallel VLSI Architecture....Pages 49-60
Translating Declaratively Specified Knowledge and Usage Requirements into a Reconfigurable Machine....Pages 61-72
Front Matter....Pages 73-74
VLSI-Appropriate Garbage Collection Support....Pages 75-84
A Self-Timed Circuit for a Prolog Machine....Pages 85-92
Front Matter....Pages 93-94
VLSI and Rule-Based Systems....Pages 95-108
Unify with Active Memory....Pages 109-118
The Pattern Addressable Memory: Hardware for Associative Processing....Pages 119-129
Front Matter....Pages 131-132
A High Performance Relational Algebraic Processor for Large Knowledge Bases....Pages 133-143
A WSI Semantic Network Architecture....Pages 144-155
Front Matter....Pages 157-158
A VLSI Implementation of Multilayered Neural Networks....Pages 159-168
A Fully Digital Integrated CMOS Hopfield Network Including the Learning Algorithm....Pages 169-178
A Neural Network for 3-D VLSI Accelerator....Pages 179-188
Shift Invariant Associative Memory....Pages 189-197
Front Matter....Pages 199-200
VLSI Bit-Serial Neural Networks....Pages 201-208
A New CMOS Architecture for Neural Networks....Pages 209-217
A Limited-Interconnect, Highly Layered Synthetic Neural Architecture....Pages 218-226
Front Matter....Pages 199-200
VLSI-Design of Associative Networks....Pages 227-235
Fully-Programmable Analogue VLSI Devices for the Implementation of Neural Networks....Pages 236-244
Front Matter....Pages 245-246
Are Special Chips Necessary for Neural Computing?....Pages 247-254
A VLSI Systolic Array Dedicated to Hopfield Neural Network....Pages 255-264
An Integrated System for Neural Network Simulations....Pages 265-272
Back Matter....Pages 273-274

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Content:
Front Matter....Pages i-xiii
Front Matter....Pages 1-1
From Low Level Semantic Description of Prolog to Instruction Set and VLSI Design....Pages 3-12
A 32 Bit Processor for Compiled Prolog....Pages 13-26
Carmel-1: A VLSI Architecture for Flat Concurrent Prolog....Pages 27-37
VLSI for Parallel Execution of Prolog....Pages 38-46
Front Matter....Pages 47-48
Supporting Functional and Logic Programming Languages through a Data Parallel VLSI Architecture....Pages 49-60
Translating Declaratively Specified Knowledge and Usage Requirements into a Reconfigurable Machine....Pages 61-72
Front Matter....Pages 73-74
VLSI-Appropriate Garbage Collection Support....Pages 75-84
A Self-Timed Circuit for a Prolog Machine....Pages 85-92
Front Matter....Pages 93-94
VLSI and Rule-Based Systems....Pages 95-108
Unify with Active Memory....Pages 109-118
The Pattern Addressable Memory: Hardware for Associative Processing....Pages 119-129
Front Matter....Pages 131-132
A High Performance Relational Algebraic Processor for Large Knowledge Bases....Pages 133-143
A WSI Semantic Network Architecture....Pages 144-155
Front Matter....Pages 157-158
A VLSI Implementation of Multilayered Neural Networks....Pages 159-168
A Fully Digital Integrated CMOS Hopfield Network Including the Learning Algorithm....Pages 169-178
A Neural Network for 3-D VLSI Accelerator....Pages 179-188
Shift Invariant Associative Memory....Pages 189-197
Front Matter....Pages 199-200
VLSI Bit-Serial Neural Networks....Pages 201-208
A New CMOS Architecture for Neural Networks....Pages 209-217
A Limited-Interconnect, Highly Layered Synthetic Neural Architecture....Pages 218-226
Front Matter....Pages 199-200
VLSI-Design of Associative Networks....Pages 227-235
Fully-Programmable Analogue VLSI Devices for the Implementation of Neural Networks....Pages 236-244
Front Matter....Pages 245-246
Are Special Chips Necessary for Neural Computing?....Pages 247-254
A VLSI Systolic Array Dedicated to Hopfield Neural Network....Pages 255-264
An Integrated System for Neural Network Simulations....Pages 265-272
Back Matter....Pages 273-274
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