Ebook: Nanoscaled Semiconductor-on-Insulator Structures and Devices

This proceedings volume constitutes an archive of the contributions of the key-speakers who attended the NATO Advanced Research Workshop on “Nanoscaled Semiconductor-On-Insulator Structures and devices” held in the Tourist and Recreation Centre “Sudak” (Crimea, Ukraine) from 15 to 19 October 2006. The semiconductor industry has sustained a very rapid growth during the last three decades through impressive technological developments which have resulted in products with higher performance and lower cost per function. After many years of development it is now confidently predicted that semiconductor-on-insulator materials will enter and increasingly be used by manufacturing industry. The wider use of semiconductor (es- cially silicon) on insulator materials will not only enable the benefits of these materials to be demonstrated but, also, will drive down the cost of substrates which, in turn, will stimulate the development of other novel devices and applications. Thus the semiconductor-on-insulator materials of today are not only the basis for modern microelectronics but also for future nanoscale devices and ICs. In itself this trend will encourage the promotion of the skills and ideas generated by researchers in the Former Soviet Union and Eastern Europe. Indeed, one of the goals of this Workshop is to promote the development of SOI technologies worldwide.

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This book details many of the key issues associated with the scaling to nano-dimensions of silicon-on-insulator (SOI) structures. It offers new insight particularly at the device/circuit interface as appropriate for SOI which is fast becoming a mainstream technology. Coverage examines

mobility degradation in SOI films less than about 5nm as well as

atomistic level effects. In addition, the book presents results for Monte Carlo and drift/diffusion modeling together with device compact models and circuit level simulation, which provides for a broad exposure of the problems from intrinsic physics to the circuit level.

The book also examines scaling to nano-dimensions, from both technological and physics aspects, and considers the scope of potential applications for quantum dots, quantum wires and nanotubes. The use of semiconductor materials other than Si, on insulator, is featured in some sections of the book. The potential of III/V, Ge and other materials to facilitate continuation down the roadmap is illustrated by a review of the state-of-the-art.

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This book details many of the key issues associated with the scaling to nano-dimensions of silicon-on-insulator (SOI) structures. It offers new insight particularly at the device/circuit interface as appropriate for SOI which is fast becoming a mainstream technology. Coverage examines

mobility degradation in SOI films less than about 5nm as well as

atomistic level effects. In addition, the book presents results for Monte Carlo and drift/diffusion modeling together with device compact models and circuit level simulation, which provides for a broad exposure of the problems from intrinsic physics to the circuit level.

The book also examines scaling to nano-dimensions, from both technological and physics aspects, and considers the scope of potential applications for quantum dots, quantum wires and nanotubes. The use of semiconductor materials other than Si, on insulator, is featured in some sections of the book. The potential of III/V, Ge and other materials to facilitate continuation down the roadmap is illustrated by a review of the state-of-the-art.

Content:
Front Matter....Pages i-xiii
Front Matter....Pages 2-2
Status and trends in SOI nanodevices....Pages 3-18
Non-Planar Devices for Nanoscale CMOS....Pages 19-32
High-? Dielectric Stacks for Nanoscaled SOI Devices....Pages 33-58
Nanoscaled Semiconductor Heterostructures for CMOS Transistors Formed by Ion Implantation and Hydrogen Transfer....Pages 59-72
Fluorine –Vacancy Engineering: A Viable Solution for Dopant Diffusion Suppression in SOI Substrates....Pages 73-87
Suspended Silicon-On-Insulator Nanowires for the Fabrication of Quadruple Gate MOSFETs....Pages 89-94
Front Matter....Pages 96-96
Integration of silicon Single-Electron Transistors Operating at Room Temperature....Pages 97-112
SiGe Nanodots in Electro-Optical SOI Devices....Pages 113-128
Nanowire Quantum Effects in Trigate SOI MOSFETs....Pages 129-142
Semiconductor Nanostructures and Devices....Pages 143-158
MuGFET CMOS Process with Midgap Gate Material....Pages 159-164
Doping Fluctuation Effects in Multiple-Gate SOI MOSFETs....Pages 165-170
SiGeC HBTs: impact of C on Device Performance....Pages 171-178
Front Matter....Pages 180-180
Noise Research of Nanoscaled SOI Devices....Pages 181-198
Electrical Characterization and Special Properties of FINFET Structures....Pages 199-220
Substrate Effect on the Output Conductance Frequency Response of SOI MOSFETs....Pages 221-238
Investigation of Compressive Strain Effects Induced by STI and ESL....Pages 239-250
Charge Trapping Phenomena in Single Electron NVM SOI Devices Fabricated by a Self-Aligned Quantum DOT Technology....Pages 251-256
Front Matter....Pages 258-258
Variability in Nanoscale UTB SOI Devices and its Impact on Circuits and Systems....Pages 259-302
Electron Transport in Silicon-on-Insulator Nanodevices....Pages 303-322
Front Matter....Pages 258-258
All Quantum Simulation of Ultrathin SOI MOSFETs....Pages 323-340
Resonant Tunneling Devices on SOI Basis....Pages 341-356
Mobility Modeling in SOI FETs for Different Substrate Orientations and Strain Conditions....Pages 357-362
Three-Dimensional (3-D) Analytical Modeling of the Threshold Voltage, DIBL and Subthreshold Swing of Cylindrical Gate all Around Mosfets....Pages 363-368
Back Matter....Pages 369-369

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This book details many of the key issues associated with the scaling to nano-dimensions of silicon-on-insulator (SOI) structures. It offers new insight particularly at the device/circuit interface as appropriate for SOI which is fast becoming a mainstream technology. Coverage examines

mobility degradation in SOI films less than about 5nm as well as

atomistic level effects. In addition, the book presents results for Monte Carlo and drift/diffusion modeling together with device compact models and circuit level simulation, which provides for a broad exposure of the problems from intrinsic physics to the circuit level.

The book also examines scaling to nano-dimensions, from both technological and physics aspects, and considers the scope of potential applications for quantum dots, quantum wires and nanotubes. The use of semiconductor materials other than Si, on insulator, is featured in some sections of the book. The potential of III/V, Ge and other materials to facilitate continuation down the roadmap is illustrated by a review of the state-of-the-art.

Content:
Front Matter....Pages i-xiii
Front Matter....Pages 2-2
Status and trends in SOI nanodevices....Pages 3-18
Non-Planar Devices for Nanoscale CMOS....Pages 19-32
High-? Dielectric Stacks for Nanoscaled SOI Devices....Pages 33-58
Nanoscaled Semiconductor Heterostructures for CMOS Transistors Formed by Ion Implantation and Hydrogen Transfer....Pages 59-72
Fluorine –Vacancy Engineering: A Viable Solution for Dopant Diffusion Suppression in SOI Substrates....Pages 73-87
Suspended Silicon-On-Insulator Nanowires for the Fabrication of Quadruple Gate MOSFETs....Pages 89-94
Front Matter....Pages 96-96
Integration of silicon Single-Electron Transistors Operating at Room Temperature....Pages 97-112
SiGe Nanodots in Electro-Optical SOI Devices....Pages 113-128
Nanowire Quantum Effects in Trigate SOI MOSFETs....Pages 129-142
Semiconductor Nanostructures and Devices....Pages 143-158
MuGFET CMOS Process with Midgap Gate Material....Pages 159-164
Doping Fluctuation Effects in Multiple-Gate SOI MOSFETs....Pages 165-170
SiGeC HBTs: impact of C on Device Performance....Pages 171-178
Front Matter....Pages 180-180
Noise Research of Nanoscaled SOI Devices....Pages 181-198
Electrical Characterization and Special Properties of FINFET Structures....Pages 199-220
Substrate Effect on the Output Conductance Frequency Response of SOI MOSFETs....Pages 221-238
Investigation of Compressive Strain Effects Induced by STI and ESL....Pages 239-250
Charge Trapping Phenomena in Single Electron NVM SOI Devices Fabricated by a Self-Aligned Quantum DOT Technology....Pages 251-256
Front Matter....Pages 258-258
Variability in Nanoscale UTB SOI Devices and its Impact on Circuits and Systems....Pages 259-302
Electron Transport in Silicon-on-Insulator Nanodevices....Pages 303-322
Front Matter....Pages 258-258
All Quantum Simulation of Ultrathin SOI MOSFETs....Pages 323-340
Resonant Tunneling Devices on SOI Basis....Pages 341-356
Mobility Modeling in SOI FETs for Different Substrate Orientations and Strain Conditions....Pages 357-362
Three-Dimensional (3-D) Analytical Modeling of the Threshold Voltage, DIBL and Subthreshold Swing of Cylindrical Gate all Around Mosfets....Pages 363-368
Back Matter....Pages 369-369
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