Ebook: Power Trade-Offs and Low-Power in Analog CMOS ICs

The enormous rise of digital applications in the last two decades arouses the suggestion that analog techniques will lose their importance. However in applications that work with digital signals analog techniques are still very important for a number of reasons. First the signal that must be processed or stored may be analog at the input and output of the system. Second when digital circuits must operate at high speed the analog behavior becomes important again. And third when only limited bandwidth and signal to noise ratio is available the theoretical maximum data rate is determined by Shannon’s law. This theoretical limit can only be approximated in practice when complex modulation schemes are used, and after this modulation process the signal is analog again. Of course this does effect the tremendous advantage of digital signals compared to analog signals. Where analog signals deteriorate every time they are processed or stored, digital signals can be recovered perfectly when they are tailored to the properties of the system they are used for. The accuracy of digital signal processing is only limited by practical constraints and many digital signals can be compressed very effective so that after compression they use less bandwidth then their analog counterparts. In any aplication there will thus be analog and digital parts and often the choice has to be made if an analog or a digital solution is preferred for a certain function.

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The work presented in Power Trade-offs and Low Power in Analog CMOS ICs concerns power, noise and accuracy in CMOS Analog IC Design. In the presented material it is shown that power, noise and accuracy should be treated in an unitary way, the three terms being well inter-related. The book is divided in a theoretical part which covers sub-micron digital and sub-micron analog followed by an applicative part where accuracy related power and noise related power is encountered.
The main part of the book deals with analog circuits working in a digital environment where the process has been optimized for digital applications.

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The work presented in Power Trade-offs and Low Power in Analog CMOS ICs concerns power, noise and accuracy in CMOS Analog IC Design. In the presented material it is shown that power, noise and accuracy should be treated in an unitary way, the three terms being well inter-related. The book is divided in a theoretical part which covers sub-micron digital and sub-micron analog followed by an applicative part where accuracy related power and noise related power is encountered.
The main part of the book deals with analog circuits working in a digital environment where the process has been optimized for digital applications.
Content:
Front Matter....Pages i-xix
Introduction....Pages 1-8
Power considerations in sub-micron digital CMOS....Pages 9-29
Power considerations in sub-micron analog CMOS....Pages 31-68
Gm-C integrators for low-power and low voltage applications. A gaussian polyphase filter for mobile transceivers in 0.35?m CMOS....Pages 69-100
Chopping: a technique for noise and offset reduction....Pages 101-126
Low-noise, low residual offset, chopped amplifiers for high-end applications....Pages 127-152
A 16-bit D/A interface with Sinc approximated semidigital reconstruction filter....Pages 153-186
Conclusions....Pages 187-194
Back Matter....Pages 195-214

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The work presented in Power Trade-offs and Low Power in Analog CMOS ICs concerns power, noise and accuracy in CMOS Analog IC Design. In the presented material it is shown that power, noise and accuracy should be treated in an unitary way, the three terms being well inter-related. The book is divided in a theoretical part which covers sub-micron digital and sub-micron analog followed by an applicative part where accuracy related power and noise related power is encountered.
The main part of the book deals with analog circuits working in a digital environment where the process has been optimized for digital applications.
Content:
Front Matter....Pages i-xix
Introduction....Pages 1-8
Power considerations in sub-micron digital CMOS....Pages 9-29
Power considerations in sub-micron analog CMOS....Pages 31-68
Gm-C integrators for low-power and low voltage applications. A gaussian polyphase filter for mobile transceivers in 0.35?m CMOS....Pages 69-100
Chopping: a technique for noise and offset reduction....Pages 101-126
Low-noise, low residual offset, chopped amplifiers for high-end applications....Pages 127-152
A 16-bit D/A interface with Sinc approximated semidigital reconstruction filter....Pages 153-186
Conclusions....Pages 187-194
Back Matter....Pages 195-214
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