Ebook: Interconnect Technology and Design for Gigascale Integration

Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.

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Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.

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Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.
Content:
Front Matter....Pages i-xiii
Interconnect Opportunities for Gigascale Integration (GSI)....Pages 1-34
Copper BEOL Interconnects for Silicon CMOS Logic Technology....Pages 35-65
Interconnect Parasitic Extraction of Resistance, Capacitance, and Inductance....Pages 67-109
Distributed RC and RLC Transient Models....Pages 111-157
Power, Clock, and Global Signal Distribution....Pages 159-217
Stochastic Multilevel Interconnect Modeling and Optimization....Pages 219-262
Interconnect-Centric Computer Architectures....Pages 263-292
Chip-to-Module Interconnections....Pages 293-322
3-D ICS DSM Interconnect Performance Modeling and Analysis....Pages 323-381
Silicon Microphotonics....Pages 383-401
Back Matter....Pages 403-411

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Interconnect Technology and Design for Gigascale Integration is the cumulative effort from academic researchers at Georgia Tech, MIT, and Stanford, as well as from industry researchers at IBM T.J. Watson Research Center, LSI Logic, and SUN microsystems. The material found in this book is unique in that it spans IC interconnect topics ranging from IBM's revolutionary copper process to an in depth exploration into interconnect-aware computer architectures. This broad swath of topics presented by leaders in the research field is intended to provide a comprehensive perspective on interconnect technology and design issues so that the reader will understand the implications of the semiconductor industry's next substantial milestone - gigascale integration.
Content:
Front Matter....Pages i-xiii
Interconnect Opportunities for Gigascale Integration (GSI)....Pages 1-34
Copper BEOL Interconnects for Silicon CMOS Logic Technology....Pages 35-65
Interconnect Parasitic Extraction of Resistance, Capacitance, and Inductance....Pages 67-109
Distributed RC and RLC Transient Models....Pages 111-157
Power, Clock, and Global Signal Distribution....Pages 159-217
Stochastic Multilevel Interconnect Modeling and Optimization....Pages 219-262
Interconnect-Centric Computer Architectures....Pages 263-292
Chip-to-Module Interconnections....Pages 293-322
3-D ICS DSM Interconnect Performance Modeling and Analysis....Pages 323-381
Silicon Microphotonics....Pages 383-401
Back Matter....Pages 403-411
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