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Preface -- Acknowledgment -- Contents -- Chapter 0. Introduction to Digital Electronics -- Chapter 1. Numbering Systems -- 1.0. Introduction -- 1.1. Numbering Systems -- 1.1.1. A Review of the Decimal System -- 1.1.2. Binary Numbering System -- 1.1.3. Binary Formats -- 1.2. Data Organization -- 1.2.1. Bits -- 1.2.2. Nibbles -- 1.2.3. Bytes -- 1.2.4. Words -- 1.2.5. Double Words -- 1.3. Octal Numbering System -- 1.3.1. Octal to Decimal, Decimal to Octal Conversion -- 1.3.2. Octal to Binary, Binary to Octal Conversion -- 1.4. Hexadecimal Numbering System -- 1.4.1. Hex to Decimal and Decimal to Hex Conversion -- 1.4.2. Hex to Binary and Binary to Hex Conversion -- 1.4.3. Hex to Octal and Octal to Hex Conversion -- 1.5. Range of Number Representation -- 1.6. Binary Arithmetic -- 1.7. Negative Numbers and Their Arithmetic -- 1.7.1. 1s and 2s Complement -- 1.7.2. Subtraction Using 1s and 2s Complement -- 1.7.3. Signed Binary Representation -- 1.7.4. Arithmetic Overflow -- 1.7.5. 9s and 10s Complement -- 1.7.6. rs Complement and (r:1)s Complement -- 1.7.7. Rules for Subtraction Using rs and (r:1)s Complement -- 1.8. Binary Coded Decimal (BCD) and Its Arithmetic -- 1.9. Codes -- 1.9.1. Weighted Binary Codes -- 1.9.2. Non Weighted Codes -- 1.9.3. Error Detecting Codes -- 1.9.4. Error Correcting Codes -- 1.9.5. Hamming Code -- 1.9.6. Cyclic Codes -- 1.10. Solved Examples -- 1.11. Exercises -- Chapter 2. Digital Design Fundamentals-Boolean Algebra and Logic Gates -- 2.0. Introductory Concepts of Digital Design -- 2.1. Truth Table -- 2.2. Axiomatic Systems and Boolean Algebra -- 2.2.1. Huntingtons Postulates -- 2.2.2. Basic Theorems and Properties of Boolean Algebra -- 2.3. Boolean Functions -- 2.3.1. Transformation of Boolean Function into Logic Diagram -- 2.3.2. Complement of a Function -- 2.4. Representation of Boolean Functions -- 2.4.1. Minterm and Maxterm Realization -- 2.4.2. Standard Forms -- 2.4.3. Conversion between Standard Forms -- 2.5. Digital Logic Gates -- 2.5.1. Positive and Negative Logic Designation -- 2.5.2. Gate Definition -- 2.5.3. The AND Gate -- 2.5.4. The OR Gate -- 2.5.5. The Inverter and Buffer -- 2.5.6. Other Gates and Their Functions -- 2.5.7. Universal Gates -- 2.5.8. The Exclusive OR Gate -- 2.5.9. The Exclusive NOR gate -- 2.5.10. Extension to Multiple Inputs in Logic Gates -- 2.6. NAND and NOR Implementation -- 2.6.1. Implementation of a Multistage (or Multilevel) Digital Circuit using NAND Gates Only -- 2.6.2. Implementation of a Multilevel digital circuit using NOR gates only -- 2.7. Exercises -- Chapter 3. Boolean Function Minimization Techniques -- 3.0. Introduction -- 3.1. Minimization Using Postulates and Theorem of Boolean Algebra -- 3.2. Minimization Using Karnaugh Map (K-Map) Method -- 3.2.1. Two and Three Variable K Map -- 3.2.2. Boolean Expression Minimization Using K-Map -- 3.2.3. Minimization in Products of Sums Form -- 3.2.4. Four. -- Chapter 4. Combinational Logic -- Chapter 5. Programmable Logic Devices -- Chapter 6. Synchronous (Clocked) Sequential Logic -- Chapter 7. Shift Registers and Counters -- Chapter 8. Asynchronous Sequential Logic -- Chapter 9. Algorithmic State Machine -- Chapter 10. Switching Elements & Implementation of Logic Gates -- Chapter 11. Memory Fundamentals.;This comprehensive text fulfills the course requirement on the subject of Switching Theory and Digital Circuit Design for B. Tech. degree course in Electronics, Computer Science and Technology, Electronic & Communication, Electronic & Electrical, Electronic & Instrumentation, Electronic Instrumentation & Control, Instrumentation & Control Engineering of U.P. Technical University, Lucknow and other Technical Universities of India. It will also serve as a useful reference book for competitive examinations. All the topics are illustrated with clear diagram and simple language is used throughout the text to facilitate easy understanding of the concepts. There is no special pre-requisite before starting this book. Each chapter of the book starts with simple facts and concepts, and traverse through the examples and figures.
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